How to decouple the power supply to keep the power supply into the low impedance of each point of the integrated circuit (IC)

In the previous article Perfect Grounding vs. Imperfect Grounding, we emphasized the importance of maintaining a low impedance ground plane for providing digital and analog loop current paths. Today we will discuss equally important and relevant topics: how to use power supply decoupling to keep the power supply into the low impedance of the integrated circuit (IC) at various points.

Analog integrated circuits such as amplifiers and converters have at least two or more power supply pins. For single-supply devices, one of the pins is typically connected to ground. Mixed-signal devices such as ADCs and DACs can have both analog and digital supply voltages as well as I/O voltages. Digital ICs such as FPGAs can also have multiple supply voltages, such as core voltage, memory voltage, and I/O voltage.

Regardless of the number of power pins, the IC data sheet details the permissible range of each power supply, including the recommended operating range and maximum absolute value, and these limits must be adhered to in order to maintain proper operation and prevent damage.

However, small changes in the supply voltage due to noise or power supply ripple—even within the recommended operating range—can result in reduced device performance. For example, in an amplifier, a small power supply change produces a small change in the input and output voltages, as shown in Figure 1.

Figure 1. The power supply rejection of the amplifier shows the sensitivity of the output voltage to changes in the power rail.

The sensitivity of the amplifier to changes in the supply voltage is typically quantified by the power supply rejection ratio (PSRR), which is defined as the ratio of the supply voltage change to the output voltage change.

Figure 1 shows the PSR of a typical high performance amplifier (OP1177) falling with frequency at approximately 6dB/8 octave (20dB/10 octave). The graph shows the graph for both positive and negative power supplies. Although the PSRR is 120dB at DC, it is rapidly reduced at higher frequencies, where more and more unwanted energy is directly coupled to the output.

If the amplifier is driving the load and there is unwanted impedance on the power rail, the load current modulates the power rail, increasing noise and distortion in the AC signal.

Although the actual PSRR may not be given in the data sheet, the performance of data converters and other mixed-signal ICs will decrease with noise on the power supply. Power supply noise can also affect digital circuits in a number of ways, including reducing logic-level noise margins and timing errors due to clock jitter.

? Appropriate local decoupling is essential on the PCB

A typical 4-layer PCB is typically designed as a ground plane, power plane, top signal layer, and bottom signal layer. The ground pins of the surface mount IC are directly connected to the ground plane via vias on the pins, minimizing unwanted impedance in the ground connections.

The power rails are typically located at the power plane and routed to the various power pins of the IC. A simple IC model showing the power and ground connections is shown in Figure 2.

Figure 2. IC model showing trace impedance and local decoupling capacitance

The current generated in the IC is expressed as IT. The current flowing through the trace impedance Z produces a change in the supply voltage VS. As described above, depending on the PSR of the IC, this produces various types of performance degradation.

By using the shortest possible connection, the proper type of local decoupling capacitor can be directly connected between the power supply pin and the ground plane to minimize sensitivity to power noise and ripple. The decoupling capacitor acts as a charge reservoir for the transient current and shunts it directly to ground to maintain a constant supply voltage across the IC. Although the loop current path passes through the ground plane, the loop current generally does not produce a significant error voltage due to the low impedance of the ground plane.

Figure 3 shows the case where the high frequency decoupling capacitor must be as close as possible to the chip. Otherwise, even picked up by wire inductance decoupling will adversely affect the effectiveness.

Figure 3. Correct and incorrect placement of high frequency decoupling capacitors

On the left side of Figure 3, the power pin and ground connection may be short, so it is the most efficient configuration. However, in the right side of Figure 3, the extra inductance and resistance in the PCB traces will reduce the effectiveness of the decoupling scheme, and increasing the closed loop may cause interference problems.

? Select the correct type of decoupling capacitor

Decoupling low frequency noise typically require electrolytic capacitors (typically 1μF to 100μF), to this transient current as the low-charge reservoir. Connect low-inductance surface mount ceramic capacitors (typically 0.01μF to 0.1μF) directly to the IC supply pins to minimize high frequency power supply noise. All decoupling capacitors must be connected directly to the low inductance ground plane to be effective. This connection requires short traces or vias to minimize additional series inductance.

Most IC data sheets describe the recommended power supply decoupling circuits in the Applications section, and users should always follow these recommendations to ensure proper operation of the device.

Ferrite beads (insulating ceramics made of oxides of nickel, zinc, manganese or other compounds) can also be used to decouple in a line filter. Ferrites are inductive at low frequencies (<100kHz) - so they are useful for low pass LC decoupling filters. Above 100 kHz, ferrite is resistive (low Q). Ferrite impedance is a function of material, operating frequency range, DC bias current, number of turns, size, shape, and temperature.

Ferrite beads are not always necessary, but can enhance high frequency noise isolation and decoupling, which is usually advantageous. It may be necessary to verify that the beads will never saturate, especially when the op amp is driving high output current. When the ferrite is saturated, it becomes non-linear and loses filtering characteristics.

Please note that some ferrites may even be non-linear before full saturation. Therefore, if a power stage is required, operating with a low distortion output, the ferrite should be inspected when the prototype is operating near this saturation region. The typical ferrite bead impedance is shown in Figure 4.

Figure 4. Impedance of ferrite beads

When choosing the right type for decoupling applications, careful consideration of non-ideal capacitive performance due to parasitic resistance and inductance is required.