How to Perform High Voltage Transient Protection on Integrated Circuit Analog Inputs and Outputs

How to perform high-voltage transient protection on analog input and output of integrated circuits in accordance with IEC 61000-4-2, IEC 61000-4-4 and IEC 61000-4-5 standards;

How to design the system input and output protection circuit.

IEC 61000 is a system-level standard for EMC robustness. The three parts of this standard that deal with high voltage transients are IEC 61000-4-2, IEC 61000-4-4, and IEC 61000-4-5. These are system-level standards for electrostatic discharge (ESD), electrical fast transients (EFT) and surges. These standards define the waveforms, test methods, and test levels used to evaluate the immunity of electrical and electronic equipment in the presence of these transient effects.

The main purpose of the IEC 61000-4-2 test is to determine the immunity of the system to ESD events external to the system during operation —for example, if the system input/output contacts live bodies, cables, or tools. IEC 61000-4-2 specifies that two coupling methods are used for testing: contact discharge and air gap discharge.

The IEC 61000-4-4 EFT test involves the coupling of fast transient bursts to signal lines to characterize transient disturbances associated with external switching circuits that can be capacitively coupled to the signal lines. This test reflects switching contact jitter, or transients caused by inductive or capacitive load switching, all of which are common in industrial environments.

Figure 1. IEC System Protection for Precision Analog Inputs

Surge transients are usually caused by overvoltage conditions or lightning strikes caused by switching operations. The cause of switching transients may be a power system switch, a load change in the power distribution system, or various system failures (such as a short circuit and arc fault with the grounding system during installation). Lightning transients can be caused by nearby lightning strikes injecting high currents and voltages into the circuit.

Transient voltage suppressors (TVS) can be used to suppress voltage surges. Used to clamp high voltage transients, allowing large currents to bypass sensitive circuits. The basic parameters of TVS are:

Operating peak reverse voltage: voltage below which no significant conduction occurs

Breakdown voltage: When this value is equal to the voltage at which the conductive phenomenon occurs

Maximum clamp voltage: The maximum voltage that conducts the specified maximum current on the device

There are several factors to consider when using a TVS device on the system input or output. ESD or EFT events can generate transient waveforms with ultra-fast times (1 ns to 5 ns) that cause the initial overshoot at the system input before the TVS device clamps the breakdown voltage. Surge events have different transient waveforms with a slow rise time (1.2 μs) and a long pulse duration (50 μs); and in this event, the clamp voltage will start at the breakdown voltage but may increase to TVS maximum clamp voltage. In addition, the TVS must be above any allowable DC overvoltage that may be caused by wiring errors, power outages, or user errors to protect the system from the DC overvoltage event. All three conditions can lead to potentially damaging overvoltages at the input to downstream circuits.

In order to fully protect the system input/output nodes, the system must be protected against DC overvoltage and high voltage transients. Using a robust, precision overvoltage protection (OVP) switch at the system input node, plus TVS, can protect sensitive downstream circuits (for example, analog-to-digital converters or amplifier inputs/outputs) because this can block overvoltages. Suppression of residual current that is not diverted to ground by TVS.

Figure 2 shows a functional block diagram of a typical overvoltage protection switch; note that the switch's ESD protection diode is not referenced to the supply voltage at its input node. Instead, it has an ESD protection cell that activates when it exceeds the device's maximum withstand voltage, allowing the device to withstand and block voltages that exceed its supply voltage.

Figure 2. OVP Switch Functional Block Diagram

Since the analog system usually only requires the IEC protection of the switch's outbound pin, the ESD protection diode remains on the invert pin (marked as the switch output or drain terminal). These diodes can bring additional benefits because they act as auxiliary protection devices. In high voltage transients (such as ESD or EFT) with short duration and fast rise time, the voltage does not reach the downstream circuit because the transient voltage is clamped. During high-voltage transients (such as surges) with long durations and slow rise times, the internal protection diode clamps the switch before the switch overvoltage protection function is activated, the switch is opened, and the fault is completely separated from the downstream circuit. The output voltage.

Figure 3 shows the working area of ​​a system input with an external interface. The leftmost area (green) indicates the normal operating range and the input voltage is within the supply voltage range. The second area from the left (blue) indicates that there may be a range of continuous dc or long-term AC overvoltages at the input due to power failure, wiring errors, or short circuits. In addition, the rightmost (purple) in the figure is the trigger voltage of the internal ESD protection diode of the overvoltage switch. The selected TVS breakdown voltage (orange) must be less than the maximum withstand voltage of the overvoltage protection switch and greater than any known possible continuous DC or long-term AC overvoltage to avoid inadvertently triggering the TVS.

Figure 3. System work area

The protection circuit in Figure 4 can withstand up to 8 kV IEC ESD (contact discharge), 16 kV IEC ESD (air discharge), 4 kV EFT, and 4 kV surge. The ADG5412F (±55 V overvoltage protection and detection from ADI, quad single pole, double throw switch) can withstand overvoltages due to ESD, EFT, and surge transients. The overvoltage protection circuit is protected with the protection diode on the drain and Isolate the downstream circuit. Table 1 shows the high voltage transient levels that the ADG5412F can withstand with various combinations of TVS breakdown voltage and resistance.

Figure 4. Protection circuit

Table 1. Test results (IEC air discharge test not performed on 0 Ω resistors with 33 V TVS and 45 V TVS combinations)

Figure 4 also shows the various current paths during high-voltage transient events. Most of the current is shunted to ground through the TVS device (path I1). Path I2 shows the current consumed by the internal ESD on the output node of the ADG5412F. At the same time, the output voltage is clamped to a level 0.7 V higher than the supply voltage. Finally, the current in path I3 is the level of residual current that the downstream device must withstand.

Figure 6 and Figure 7 show the test results of the IEC ESD event at 8 kV contact discharge and 16 kV air discharge on the test circuit shown in Figure 5. As mentioned earlier, there is an initial overvoltage on the source pin before the TVS device clamps the voltage to about 54V. During this overvoltage, the voltage at the drain of the switch is clamped to a level 0.7 V higher than the supply voltage. The drain current measurement shows the current flowing into the downstream device diode. The peak pulse current is approximately 680 mA and the current duration is approximately 60 ns. In contrast, the 1 kV HBM ESD shock had a peak current of 660 mA and a duration of 500 ns. We can therefore conclude that, with this protection circuit, downstream devices with an HBM ESD rating of 1 kV should be able to withstand 8 kV contact discharge and 16 kV air discharge IEC ESD events.

Figure 5. Test circuit

Figure 6. Drain voltage and drain output current during an 8 kV event

Figure 7. Drain voltage and drain output current during a 16 kV air discharge event

Figure 8 is a pulse measurement result at the 4 kV EFT event. Similar to what happens during an ESD transient, there is an initial overvoltage on the source pin before the TVS device clamps the voltage to around 54V. During this overvoltage, the voltage at the drain of the switch is again clamped at a level 0.7 V higher than the supply voltage. In this case, the pulse peak current flowing into the downstream device is only 420 mA and the current duration is only about 90 ns. Also with the HBM ESD event, the 750 kV HBM ESD voltage has a peak current of 500 mA and a duration of 500 ns. Therefore, during the 4 kV EFT event, energy is transmitted to the pins of the downstream device, which is less than the energy at the 750 kV HBM ESD event.

Figure 8. Single-pulse EFT current

Figure 9 shows the measurement result when a 4 kV surge transient is applied to the input node of the protection circuit. As mentioned earlier, the source voltage may increase and exceed the TVS breakdown voltage until the maximum clamp voltage is reached. The overvoltage protection switch in this circuit has a response time of approximately 500 ns, and during the first 500 ns, the voltage at the drain of the device is clamped at a level 0.7 V higher than the supply voltage. During this period and after approximately 500 ns, the peak current flowing to the downstream device is only 608 mA, the switch is closed and the downstream circuit is isolated from the fault. Again, the energy here is less than the energy transmitted during the 1 kV HBM ESD event.

Figure 9. How OVP Works During a Surge Event

According to the suggestions in this paper, it will not only solve the problem of analog input IEC system protection, but also bring you the following benefits:

Simplify protection design

Accelerate product launch

Improve protection circuit performance and reduce the number of discrete components

Reduce the series resistance in the signal path

Due to the wide TVS design window, TVS selection is more convenient

System-level protection that meets the following criteria

IEC 61000-4-2 16 kV air discharge

IEC 61000-4-2 8 kV contact discharge

IEC 61000-4-4 4 kV

IEC 61000-4-5 4 kV

AC and DC Overvoltage Protection up to ±55 V

Power-off protection up to ±55V