Integrated circuit analog input and output for high voltage transient protection design

How to perform high voltage transient protection on integrated circuit analog inputs and outputs in accordance with IEC 61000-4-2, IEC 61000-4-4 and IEC 61000-4-5 standards;

How to design a system input and output protection circuit.

IEC 61000 is a system-level standard for EMC robustness. The three parts of the standard that involve high voltage transients are IEC 61000-4-2, IEC 61000-4-4, and IEC 61000-4-5. These are system level standards for electrostatic discharge (ESD), electrical fast transients (EFT), and surges. These standards define the waveforms, test methods, and test levels used to evaluate the immunity of electrical and electronic equipment where these transient effects are applied.

The primary purpose of the IEC 61000-4-2 test is to determine the immunity of the system to ESD events external to the system during operation —for example, if system inputs/outputs come into contact with live humans, cables, and tools. IEC 61000-4-2 specifies two coupling methods to be tested: contact discharge and air gap discharge.

The IEC 61000-4-4 EFT test involves coupling a fast transient burst to a signal line to characterize transient interference associated with an external switching circuit that can be capacitively coupled to the signal line. This test reflects switching contact jitter, or transients due to inductive or capacitive load switching, all of which are common in industrial environments.

Figure 1. IEC System Protection for Precision Analog Inputs

Surge transients are usually caused by overvoltage conditions or lightning strikes caused by switching operations. Switching transients can be caused by power system switching, load changes in the power distribution system, or various system faults (such as short-circuit and arc faults with the grounding system during installation). The cause of lightning transients can be that nearby lightning strikes inject high currents and voltages into the circuit.

Transient Voltage Suppressors (TVS) can be used to suppress voltage surges. Used to clamp high voltage transients, allowing large currents to bypass sensitive circuitry. The basic parameters of TVS are:

Working peak reverse voltage: a voltage that does not cause significant conduction when it is below this value

Breakdown voltage: A voltage that dictates the conduction phenomenon when it is equal to this value

Maximum clamp voltage: The maximum voltage at the device that conducts the specified maximum current

There are several factors to consider when using a TVS device on a system input or output. An ESD or EFT event produces an ultra-fast time (1 ns to 5 ns) transient waveform that causes an initial overshoot voltage on the system input before the TVS device clamps the breakdown voltage. Surge events have different transient waveforms with slow rise times (1.2 μs) and long pulse durations (50 μs); and under this event, the clamp voltage will start at the breakdown voltage, but may increase until TVS maximum clamping voltage. In addition, the TVS must be higher than any allowable DC overvoltage that may be caused by wiring errors, power outages, or user errors to protect the system from the DC overvoltage event. In all three cases it is possible to cause a potentially damaging overvoltage at the input of the downstream circuit.

In order to fully protect the system input/output nodes, DC overvoltage and high voltage transient protection must be applied to the system. A robust precision overvoltage protection (OVP) switch, plus TVS, protects sensitive downstream circuitry (eg, analog-to-digital converter or amplifier input/output) at the system input node because it blocks overvoltage Reducing the residual current that is not shunted to the ground by the TVS.

Figure 2 shows a functional block diagram of a typical overvoltage protection switch; note that the switch's ESD protection diode is not referenced to the supply voltage at its input node. Instead, it has an ESD protection unit that activates when the device's maximum withstand voltage is exceeded, allowing the device to withstand and block voltages that exceed its supply voltage.

Figure 2. OVP switch functional block diagram

Since analog systems typically only require IEC protection for the outgoing pins of the switch, the ESD protection diode remains on the inward pins (labeled as the switch output or the drain). These diodes offer additional benefits because they act as an auxiliary protection device. During high-voltage transients (such as ESD or EFT) with short durations and fast rise times, the voltage does not reach the downstream circuitry because the transient voltage is clamped. During a high-voltage transient (such as a surge) with a long duration and a slow rise time, the internal protection diode clamps the switch before the switch overvoltage protection function is activated, the switch is opened, and the fault is completely separated from the downstream circuit. Output voltage.

Figure 3 shows the working area of ​​a system input with an external interface. The leftmost area (green) indicates the normal operating range and the input voltage is within the supply voltage range. The second area from the left (blue) indicates that there may be a range of continuous DC or long-term AC overvoltage at the input due to power failure, wiring errors, or short circuits. In addition, the far right (purple) in the figure is the trigger voltage of the internal ESD protection diode of the overvoltage switch. The selected TVS breakdown voltage (orange) must be less than the maximum withstand voltage of the overvoltage protection switch and greater than any known continuous DC or long time AC overvoltage to avoid inadvertently triggering the TVS.

Figure 3. System work area

The protection circuit in Figure 4 can withstand up to 8 kV IEC ESD (contact discharge), 16 kV IEC ESD (air discharge), 4 kV EFT and 4 kV surge. The ADG5412F (±55 V overvoltage protection and detection from ADI, four-channel single-pole double-throw switch) can withstand overvoltages caused by ESD, EFT, and surge transients, and the overvoltage protection circuit protects with the protection diode on the drain. Isolate the downstream circuit. Table 1 shows the high voltage transient levels that the ADG5412F can withstand with various combinations of TVS breakdown voltage and resistance.

Figure 4. Protection circuit

Table 1. Test results (not tested for IEC air discharge with 0 Ω resistor in combination with 33 V TVS and 45 V TVS)

Figure 4 also shows the various current paths during a high voltage transient event. Most of the current is shunted to ground (path I1) through the TVS device. Path I2 shows the current drawn by the internal ESD on the output node of the ADG5412F, while the output voltage is clamped to a level 0.7 V above the supply voltage. Finally, the current in path I3 is the level of residual current that the downstream device must withstand. For more details on this protection circuit, please refer to the ADI Application Note, IEC System Protection for Analog Input Using the ADG5412F (link: http://AN-1436_cn.pdf ) .

Figures 6 and 7 show the test results on the test circuit shown in Figure 5 for the 8 kV contact discharge and 16 kV air discharge IEC ESD events. As mentioned earlier, there is an initial overvoltage on the source pin before the TVS device clamps the voltage to approximately 54 V. During this overvoltage, the voltage on the drain of the switch is clamped to a level 0.7 V above the supply voltage. The drain current measurement shows the current flowing into the downstream device diode. The pulse peak current is approximately 680 mA and the current duration is approximately 60 ns. In contrast, the 1 kV HBM ESD shock has a peak current of 660 mA and a duration of 500 ns. We can therefore conclude that downstream devices with HBM ESD ratings of 1 kV should be able to withstand 8 kV contact discharge and 16 kV air discharge IEC ESD events with this protection circuit.

Figure 5. Test circuit

Figure 6. Drain voltage and drain output current during an 8 kV event

Figure 7. Drain voltage and drain output current during a 16 kV air discharge event

Figure 8 is a measurement of one pulse at the 4 kV EFT event. Similar to what happens during ESD transients, there is an initial overvoltage on the source pin before the TVS device clamps the voltage to around 54 V. During this overvoltage, the voltage on the drain of the switch is clamped again to a level 0.7 V above the supply voltage. In this case, the peak current of the pulse flowing into the downstream device is only 420 mA, and the current duration is only about 90 ns. Also with the HBM ESD event, the 750 kV HBM ESD has a peak current of 500 mA and a duration of 500 ns. Therefore, during the 4 kV EFT event, energy is transferred to the pins of the downstream device, which is less than the energy at the 750 kV HBM ESD event.

Figure 8. EFT current for a single pulse

Figure 9 shows the measurement results when a 4 kV surge transient is applied to the input node of the protection circuit. As mentioned earlier, the source voltage may increase and exceed the TVS breakdown voltage until the maximum clamp voltage is reached. The overvoltage protection switch in this circuit has a response time of approximately 500 ns, and during this first 500 ns, the voltage across the drain of the device is clamped to a level 0.7 V above the supply voltage. During this time and after approximately 500 ns, the peak current to the downstream device is only 608 mA, the switch is turned off and the downstream circuitry is isolated from the fault. Again, the energy here is less than the energy transmitted during the 1 kV HBM ESD event.

Figure 9. How OVP works during a surge event

According to the recommendations in this paper, not only can the analog input IEC system protection be solved, but it will also bring you the following benefits:

Simplified protection design

Accelerate time to market

Improve protection circuit performance and reduce the number of discrete components

Reduce the series resistance in the signal path

TVS selection is more convenient due to the wide TVS design window

System-level protection to the following standards

IEC 61000-4-2 16 kV air discharge

IEC 61000-4-2 8 kV contact discharge

IEC 61000-4-4 4 kV

IEC 61000-4-5 4 kV

AC and continuous DC overvoltage protection up to ±55 V

Power-down protection up to ±55V