PCI bus integrated circuit tester interface circuit design

Test - lowercase jpg

Kaixin micro test

Test probe P100-M3

Industrial Router Crystal 3.2*2.5mm 3225 26M (26.000MHZ) 12PF 10PPM 20PPM 30PPM

The devices currently widely used in integrated circuit package testing are controlled by computer software and communicate with hardware devices through interface buses, which can replace most of the labor of testers, also known as automated test systems (ATE). The working principle is: using the test software to write the test program of the test chip in the computer, the process of writing the test program is to realize the scheduling of the test system hardware resources by using the programming language, and applying the test pattern to the pins of the tested integrated circuit; Using the test software to execute the test program, the process requires the computer to communicate with the test system, call the drive function of the test system hardware circuit, and send the control command to the corresponding port of the test hardware via the computer's I/O interface; the tester hardware interface is translated. After the code circuit is decoded, the hardware action is driven to realize the established test function; the data result of the test is returned by the I/O interface of the computer; the computer analyzes and processes the result data, discriminates according to certain standards, and displays and controls the test result. The machine selects the device under test.

PCI bus signal definition

The signals of the PCI bus mainly include a PCI bus signal, an E2PROM interface signal, and a local bus signal. The circuit connection diagram of the main signal is shown in the figure.

E2PROM control signal

The configuration information of the PCI bus interface chip needs to be stored through the E2PROM and loaded when there is no reset. The signal lines EECS, EESK, EEDI and EEDO of PCI9030 are specially used for E2PROM connection. The E2PROM which is not selected for use is NM93CS66L. The chip has a low-level serial memory of 4 KB capacity and performs re-processing on the chip PCI9030. The storage information is loaded during operation, thereby enabling the PCI interface card to implement the plug and play function. The circuit connection between PCI9030 and NM93CS66L is shown in the figure.

The PCI interface chip can be combined with the FPGA to realize the simplified design of the PCI interface circuit and shorten the development cycle. The SDK software development kit can easily complete the configuration and debugging of the PCI chip, and use the VC6.0 software development tool in the Windows XP operating system. Loading the API library in the SDK enables the design of PCI drivers for integrated circuit testing. Through the interface circuit, the function of using the PC software to control the hardware circuit to complete the IC test is realized.