The principle and function of integrated circuit digital-to-analog converter

Integrated circuit digital-to-analog converters are binary inputs, while digital-to-analog converters with op amps are not limited by the number and number of bits. It uses the op amp's inverse adder principle, as shown in Figure 1.

When the gain of the op amp is high enough, its inverting input is virtual ground, and its output voltage v0 is determined by:

When VI=V2=V3=V4=V. If Rl=, then Vo=-V(1+2+4+8) constitutes a binary digital-to-analog converter. Of course, the number of resistors can also be increased to form a converter of more bits.

Such as increasing the resistance:

(10+20+40+80)], you can form a two-digit decimal BCD code digital-to-analog converter. In fact, the above conclusions can also be drawn by analyzing the parallel connection method.

The specific circuit of the digital-to-analog converter constructed according to the above principle is shown in FIG. 2 and FIG. 3. Considering the limitation of the output voltage range of the op amp, under the premise of keeping the above proportional relationship unchanged, the value of the resistor is properly processed, and the value of the feedback resistor R can be changed because it does not affect the mutual proportional relationship in the conversion. And only affect the size of the output voltage.

The op amps in the figure must be CMOS type. Because the CMOS type input is high impedance, the selection of a wide range of resistance values ​​and bias currents as low as a few μA have little effect on conversion accuracy. The offset voltage of the op amp is generally within 2mV. It only has a slight effect on the low voltage. When the voltage is high, it is ignored. If the requirements are high, an op amp with a zeroed terminal can be used.

The resistor must use a metal film resistor. The selection principle is that the resistance is smaller, and the accuracy is higher. If it is as large as 16MΩ, Shenyang will stop with ±5% error, and only make the minimum voltage 0.039V become 0.037V or 0.041V. The error to the full-scale voltage 9.96V is only 0.02%, while the 125kΩ resistance is only 1%. The error will also make the full-scale voltage error of O.5%, so the error of the small resistance should be minimized.

Because the output voltage is opposite in polarity to the reference voltage. A first-stage op amp can be added to convert the negative voltage to a positive voltage. It is also possible to change the voltage level by adjusting the R inverse to suit the needs of various occasions.

The input interface of the above-mentioned digital-to-analog converter, if the dial switch is shown, has no problem in that its on-resistance is extremely small. If driving in a CMOS circuit, the effect of the on-resistance should be considered.

The author measured, 74HC series circuit high-level output resistance is about 50Ω, low-level filling resistance is about 40Ω, and the above resistance of CD series circuit is as high as 200Ω～500Ω. If the 5V power supply is used as the reference power supply and the converter is driven by the 74HC series circuit, the error caused by the on-resistance does not exceed 0.04%.

Generally can be ignored. At the same time, it can also compensate 5V power supply _ Ding 10 for 5.002V. Higher requirements can also reduce 125kΩ to 124.95kΩ), 250kΩ to 249.95kΩ, and so on. When the low level, the voltage across the resistor is 0, no need to consider. The on-resistance of the CD series circuit is too large and is not recommended.

When the resistor is selected, a digital multimeter can be connected to the output to monitor the voltage. For example, 16MΩ resistor should output 30mV, 8MΩ resistor should output 78mV...250Ω) resistor should output 2.5V, 125kΩ resistor should output 5V. This will calibrate the resistance.