Trigger circuit controlled by thyristor based on 555 integrated chip

One-piece inductor

As shown in the figure, 555 and R1, RP1, C2, etc. constitute a trigger delay circuit. Normally, since R1 is connected to VDD, 555 is in the reset state, that is, the 3 pin is at a low level; when the trigger signal arrives, the SCR is turned on, and the 2 pin has a low level signal, so that the 555 is inverted and the output is high. The temporary stability width is τ=1.1RP1C2. After triggering, the SCR is turned off. This circuit reduces the need for trigger pulses. If the CMOS type 555 (or 556) is used, the trigger current can also be reduced.